Instruction Formats

A computer will usually have a variety of instruction code formats. It is the function of the control unit within the CPU to interpret each instruction code and provide the necessary control functions needed to process the instruction.

The format of an instruction is usually depicted in a rectangular box symbolizing the bits of the instruction as they appear in memory words or in a control register. The bits of the instruction are divided into groups called fields. The most common fields found in instruction formats are:

• An operation code field that specifies the operation to be performed. 
• An address field that designates a memory address or a processor register.
• A mode field that specifies the way the operand or the effective address is determined. 

The operation code field of an instruction is a group of bits that define various processor operations, such as add, subtract, complement, and shift. The bits that define the mode field of an instruction code specify a variety of alternatives for choosing the operands from the given address.

Three-Address Instructions:

Computers with three-address instruction formats can use each address field to specify either a processor register or a memory operand. The program in assembly language that evaluates X = (A + B) • (C + D) is,

ADD  R 1 , A, B    R 1 <-- M[A] + M[B]

ADD  R 2 , C, D    R 2 <-- M[C] + M[D] 

MUL  X, R 1 ,R2  M[X] <-- R 1 • R 2 

It is assumed that the computer has two processor registers, R 1 and R2. The symbol M [A] denotes the operand at memory address symbolized by A. 

The advantage of the three-address format is that it results in short programs when evaluating arithmetic expressions. 

The disadvantage is that the binary-coded instructions require too many bits to specify three addresses.

Two-Address Instructions:

Two-address instructions are the most common in commercial computers. Here again each address field can specify either a processor register or a memory word. The program to evaluate X = (A + B) • (C + D) is

MOV     R 1 , A         R 1 <-- M[A] 

ADD     R 1,B           R1 <-- R1 + M[B] 

MOV     R 2 , C        R 2 <-- M[C] 

ADD     R 2 , D        R 2 <-- R2 + M[D] 

MUL     R 1 , R 2     R1 <-- R 1 • R2 

MOV     X, R1         M[X] <-- R1

The MOV instruction moves or transfers the operands to and from memory and processor registers. The first symbol listed in an instruction is assumed to be both a source and the destination where the result of the operation is transferred.  

One-Address Instructions:

One-address instructions use an implied accumulator (AC) register for all data manipulation. For multiplication and division there is a need for a second register. However, here we will neglect the second register and assume that the AC contains the result of all operations. The program to evaluate X = (A + B) • (C + D) is

LOAD        A            A C <- M[A]

ADD          B            AC <-AC + M[B]

STORE       T            M[T] <- AC 

LOAD        C             A C <-M[C] 

ADD           D           A C <- AC + M[D] 

MUL           T             A C <- AC•M[ T]

STORE       X             M[X] <- AC  

All operations are done between the AC register and a memory operand. T is the address of a temporary memory location required for storing the intermediate result.

Zero-Address Instructions:

A stack-organized computer does not use an address field for the instructions ADD and MUL. The PUSH and POP instructions, however, need an address field to specify the operand that communicates with the stack. The following program shows how X = (A + B) • (C + D) will be written for a stack organized computer. (TOS stands for top of stack.)  

PUSH        A            TOS <-A

PUSH        B            TOS <-B

ADD                        TOS<-(A + B )  

PUSH        C            TOS <-C 

PUSH        D            TOS <-D 

ADD                        TO S<-(C + D ) 

MUL                        TOS<-( C + D )•( A+B ) 

POP           X            M[X] <-TOS 

To evaluate arithmetic expressions in a stack computer, it is necessary to convert the expression into reverse Polish notation. The name "zero-address" is given to this type of computer because of the absence of an address field in the computational instructions.